1. Field of the Invention
The present invention relates to protecting programmable logic device programming files
2. Description of Related Art
Programmable logic devices (“PLDs”) (also sometimes referred to as CPLDs, PALs, PLAs, FPLAs, EPLDs, EEPLDs, LCAs, FPGAs, or by other names), are well known integrated circuits that provide the advantages of fixed integrated circuits with the flexibility of custom integrated circuits. Such devices are well known in the art and typically provide an “off the shelf” device having at least a portion that can be programmed to meet a user's specific needs. Application specific integrated circuits (“ASICs”) have traditionally been fixed integrated circuits, however, it is possible to provide an ASIC that has a portion or portions that are programmable; thus, it is possible for an integrated circuit device to have qualities of both an ASIC and a PLD. The term PLD as used herein will be considered broad enough to include such devices.
PLDs typically include blocks of logic elements, sometimes referred to as logic array blocks (“LABs”; also referred to by other names, e.g., “configurable logic blocks,” or “CLBs”). Logic elements (“LEs”, also referred to by other names, e.g., “logic cells”) may include a look-up table (LUT) or product term, carry-out chain, register, and other elements. LABs (comprising multiple LEs) may be connected to horizontal and vertical lines that may or may not extend the length of the PLD.
PLDs have configuration elements that may be programmed or reprogrammed. Configuration elements may be realized as RAM bits, flip-flops, EEPROM cells, or other memory elements. Placing new data into the configuration elements programs or reprograms the PLD's logic functions and associated routing pathways. Configuration elements that are field programmable are often implemented as RAM cells (sometimes referred to as “CRAM” or “configuration RAM”). However, many types of configurable elements may be used including static or dynamic random access memory, electrically erasable read-only memory, flash, fuse, and anti-fuse programmable connections. The programming of configuration elements could also be implemented through mask programming during fabrication of the device. While mask programming may have disadvantages relative to some of the field programmable options already listed, it may be useful in certain high volume applications. For purposes herein, the generic term “configuration element” will be used to refer to any programmable element that may be configured to determine functions implemented by or routing between other PLD elements.
PLDs having redundant circuitry can help improve production yields by providing regions on the device that can be repaired by engaging the redundant circuitry. A row based redundancy scheme typically provides at least one redundant or “spare” row in an array of logic circuitry (e.g. an array of LABs and associated routing). Row based redundancy schemes are described, for example, in commonly assigned U.S. Pat. Nos. 6,201,404 (entitled “Programmable Logic Device with Redundant Circuitry”) and 6,344,755 (entitled “Programmable Logic Device with Redundant Circuitry”) and are further described in commonly assigned pending U.S. patent application Ser. Nos. 10/159,581 (entitled “Programmable Logic Device with Redundant Circuitry”) and 10/856,434 (“Redundancy Structures and Methods in a Programmable Logic Device”). Typically, a repairable region may be defined above the spare row such that, if one of the rows of the logic array is defective, the spare row is activated and each row from the spare row to the bad row replaces the next higher row, thus repairing the defective region.
A PLD provider typically sells PLDs to a PLD customer and also provides that customer with a configuration program for programming the PLDs. The PLD customer then uses the configuration program to generate a programming data file that implements a particular device design when loaded onto the PLD. There is a risk to the PLD customer, however, that a competitor may improperly take the data file and purchase the same PLDs off the shelf from the PLD provider in order to misappropriate and implement the PLD customer's design.
It is possible to use known key-based encryption methods to secure a programming file. In such methods, an unlicensed competitor is prevented from decrypting the file to properly program a PLD if that competitor lacks the correct key. However, such methods have the disadvantage of requiring somewhat cumbersome decryption circuitry, thus imposing an undesirably high cost in terms of space used on the PLD. Thus, more efficient methods and structures are needed for protecting a PLD customer's PLD programming data.